ＴＮＳ−ＨＦＣ４・ＴＮＳ−ＨＦＣ３・ＴＮＳ−ＨＦＰ１・ＴＮＳ−ＨＦＣ２ Bank Switching
And Memory Usage Guidelines
＋
Expansion Slot Sound Source Unit Guidelines

Introduction

Using NSF Players one can determine NSF compatibility without hardware verification.
Although the TNS-HFC4, TNS-HFC3, TNS-HFP1, and TNS-HFC2 are designed based on NSF format Ver. 1.61, a very small difference between this Family Computer and the emulator may interfere with the NSF data
performance on the TNS-HFC4, TNS-HFC3, TNS-HFP1, and TNS-HFC2.
HFC2 may interfere with playing NSF data on TNS-HFC4, TNS-HFC3, TNS-HFP1, and TNS-HFC2.

Before Bankswitching

In the CPU used in the Family Computer (hereafter referred to as NES), the following addresses have special meanings.

The contents written to this address are read into the CPU in the instruction cycle following the φ2 cycle in which the interrupt request is input to the CPU.

Here is an example of operation failure when accessing the NSF standard specification bank switching register.

NSF File Initial Load State

In this state, the three interrupt vectors mentioned above are written to addresses $0FFA to $0FFF in bank number $07.
Therefore, the bank registers are manipulated from the CPU-side application.

Bank Registers In Operation

In the address seen from the CPU, the data read from $F000 to $FFFFF is the same as the data written to $8000 to $8FFF.
In other words, the vector address that the CPU reads when an interrupt occurs is $8FFA-8FFF, and if a valid address for this address is
not written, the application will run out of control because the interrupt jump destination is incorrect.

How to switch banks for TNS-HFC4, TNS-HFP1, and NES actual machine performance

There are two methods of bank switching that do not cause the application to run out of control.

1. Allocate a dedicated bank number for interrupt vectors.
   Specific Example:
   

   CPU Address	Corresponding Bank Register	TNS-HFC4 Bank Number	TNS-HFC3 (1024KB Version) Bank Number	TNS-HFC2 Bank Number	TNS-HFP1 Bank Number
   ＄８０００〜８ＦＦＦ	＄５ＦＦ８	＄００〜ＦＥ (Variable)	＄００〜ＦＦ (Variable)	＄００〜７Ｆ (Variable)	＄００〜１Ｅ (Variable)
   ＄９０００〜９ＦＦＦ	＄５ＦＦ９	＄００〜ＦＥ (Variable)	＄００〜ＦＦ (Variable)	＄００〜７Ｆ (Variable)	＄００〜１Ｅ (Variable)
   ＄Ａ０００〜ＡＦＦＦ	＄５ＦＦＡ	＄００〜ＦＥ (Variable)	＄００〜ＦＦ (Variable)	＄００〜７Ｆ (Variable)	＄００〜１Ｅ (Variable)
   ＄Ｂ０００〜ＢＦＦＦ	＄５ＦＦＢ	＄００〜ＦＥ (Variable)	＄００〜ＦＦ (Variable)	＄００〜７Ｆ (Variable)	＄００〜１Ｅ (Variable)
   ＄Ｃ０００〜ＣＦＦＦ	＄５ＦＦＣ	＄００〜ＦＥ (Variable)	＄００〜ＦＦ (Variable)	＄００〜７Ｆ (Variable)	＄００〜１Ｅ (Variable)
   ＄Ｄ０００〜ＤＦＦＦ	＄５ＦＦＤ	＄００〜ＦＥ (Variable)	＄００〜ＦＦ (Variable)	＄００〜７Ｆ (Variable)	＄００〜１Ｅ (Variable)
   ＄Ｅ０００〜ＥＦＦＦ	＄５ＦＦＥ	＄００〜ＦＥ (Variable)	＄００〜ＦＦ (Variable)	＄００〜７Ｆ (Variable)	＄００〜１Ｅ (Variable)
   ＄Ｆ０００〜ＦＦＦＦ	＄５ＦＦＦ	＄０７ (Fixed)	＄０７ (Fixed)	＄０７ (Fixed)	＄０７ (Fixed)

   With the above bank register settings, write an interrupt vector (vector is set within CPU addresses $F000 to $FFFF) in bank number $07.
   However, depending on the application, memory utilization may be less efficient.
   
2. Always write the correct interrupt vector at a specific address in the bank.
   Specific examples are:
   

   CPU Address	Corresponding Bank Register	TNS-HFC4 Bank Number	TNS-HFC3 (1024KB Version) Bank Number	TNS-HFC2 Bank Number	TNS-HFP1 Bank Number
   ＄８０００〜８ＦＦＦ	＄５ＦＦ８	＄００	＄００	＄００	＄００
   ＄９０００〜９ＦＦＦ	＄５ＦＦ９	＄０1	＄０1	＄０1	＄０1
   ＄Ａ０００〜ＡＦＦＦ	＄５ＦＦＡ	＄００〜ＦＥ (Variable)	＄００〜ＦＦ (Variable)	＄００〜７Ｆ (Variable)	＄００〜１Ｅ (Variable)
   ＄Ｂ０００〜ＢＦＦＦ	＄５ＦＦＢ	＄００〜ＦＥ (Variable)	＄００〜ＦＦ (Variable)	＄００〜７Ｆ (Variable)	＄００〜１Ｅ (Variable)
   ＄Ｃ０００〜ＣＦＦＦ	＄５ＦＦＣ	＄００〜ＦＥ (Variable)	＄００〜ＦＦ (Variable)	＄００〜７Ｆ (Variable)	＄００〜１Ｅ (Variable)
   ＄Ｄ０００〜ＤＦＦＦ	＄５ＦＦＤ	＄００〜ＦＥ (Variable)	＄００〜ＦＦ (Variable)	＄００〜７Ｆ (Variable)	＄００〜１Ｅ (Variable)
   ＄Ｅ０００〜ＥＦＦＦ	＄５ＦＦＥ	＄００〜ＦＥ (Variable)	＄００〜ＦＦ (Variable)	＄００〜７Ｆ (Variable)	＄００〜１Ｅ (Variable)
   ＄Ｆ０００〜ＦＦＦＦ	＄５ＦＦＦ	＄００	＄００	＄００	＄００

   With the above bank register settings, write interrupt vectors at addresses $0FFA to $0FFF of bank number $00.
   When writing applications, programs cannot be placed at CPU addresses $8FFA to $8FFF.
   It is necessary to avoid this by using jump instructions, etc., or reserving 6 bytes of memory.

How to use TNS-HFC4 Expansion Memory

In TNS-HFC4, the main memory and bank memory are shared.
The maximum usable NSF file size is limited to 1040512 bytes due to the shared bank memory with the main memory.

TNS-HFC4 has 8KB of built in Character Memory.

Address mirror (horizontal and vertical) control uses the register (bit 3) located at $4025.
Memory transfer from the CPU to the PPU must be handled by the user application.

Memory is not cleared when writing to $8000 to DFFF, which usually occurs when enabling RP2C33 sound, does not occur with the TNS-HFC4.
All the written data is passed to the optional expansion sound source slot or TNS-HFX4.

How to use TNS-HFP1 Expansion Memory

In TNS-HFP1, the main memory and bank memory are shared.
The maximum usable NSF file size is limited to 126720 bytes due to the shared bank memory with the main memory.

TNS-HFP1 has 2KB Nametable Memory and 8KB CHR ROM.

Address mirror (horizontal and vertical) control uses the register (bit 7) placed in $5FED.
Memory transfer from CPU to PPU must be handled by the user application side.

Memory is not cleared when writing to $8000 to DFFF, which usually occurs when enabling RP2C33 sound, does not occur with the TNS-HFP1.
All writes are blocked.

How to Use TNS-HFC3 and TNS-HFC2 Expansion Memory

The TNS-HFC3 and TNS-HFC2 implement the memory shown in the table below, in addition to the 2KBx2 that the NES comes standard with.

Address availability uses registers placed in $5FEC.

Address mirror (horizontal and vertical) control uses the register (bit 7) placed in $5FED.
Memory transfer from CPU to PPU must be handled by the user application side.

The memory occupying CPU address $6000-7FFF is often used in NSF players.
It is treated the same as when enabling RP2C33 sound.
Unlike the state in which the disk system sound source is enabled by NSF playing on emulators such as Windows,
TNS-HFC3 and TNS-HFC2 cannot use $5FFF6 and $5FFF7 to switch banks $6000-$6FFF and $7000-$7FFF.
The $6000-$7FFF range is treated as SRAM. (Pointed out by "h7")
This memory can be used to move the sound driver data itself into this memory space,
place the processing routines for the aforementioned interrupt vectors, etc.

Memory is not cleared when writing to $8000 to DFFF, which usually occurs when enabling RP2C33 sound,

does not occur with the TNS-HFC3 and TNS-HFC2.
Writes are passed to the (optional) expansion sound slot or TNS-HFX4 on TNS-HFC3,
and to the TNS-HFE4 expansion unit for TNS-HFC2.

How to use the on-board sound source of the TNS-HFX4 and TNS-HFE4 expansion slot units.

In the expansion slot unit, the real address is remapped to prevent bus conflicts.

For SUNSOFT 5B expansion sound, the software remaps writes to the YMZ294 SSG (φ?1.78MHz).
VRC7's address is not remapped to the on-board YM2413 chip (φ?3.58MHz).

All devices on the expansion sound slots are read-only.
Attempting to read from these registers will return undefined values,
so please treat expansion sound slots as write-only when programming.

Page Revision History

April 1, 2006: First Edition
April 16, 2006: Corrected functionality in the $6000-$7FFF area
April 20, 2006: Addition of notation with/without backup
September 11, 2007: Added TNS-HFP1 bank specifications
September 11, 2009: Added TNS-HFC3 bank specifications
February 11, 2013: Added TNS-HFC4 bank specifications
August 1, 2013: Added specification for Expansion Sound Slot Unit
February 8, 2023: Page (unofficially) translated into English